1. Field of the Invention
The present invention relates to an image display system and more particularly, this invention is related to a technique to a projection apparatus implemented with a spatial light modulator.
2. Description of the Related Art
After the dominance of CRT technology in the display industry for over 100 years, Flat Panel Displays (hereafter FPD) and Projection Displays have gained popularity because the FDP display implements a more compact image projecting system while projecting images on a larger display screen. Of several types of projection displays, projection displays using micro-displays are gaining recognition among the consumers because of their high picture quality and a lower cost than FPDs. There are two types of micro-displays used for projection displays on the market, i.e., micro-LCDs (Liquid Crystal Displays) and micromirror technology. Because the micromirror devices display images with an unpolarized light, the images projected by the micromirror device have a brightness superior to that of micro-LCDs, which use polarized light.
Even though there have been significant advances made in recent years in the technologies of implementing electromechanical micromirror devices as spatial light modulators (SLM), there are still limitations and difficulties when they are employed to display high quality images. Specifically, when the display images are digitally controlled, the quality of the images is adversely affected because the images are not displayed with a sufficient number of gray scale gradations.
Electromechanical micromirror devices have drawn considerable interest because of their application as spatial light modulators (SLMs). A spatial light modulator requires an array of a relatively large number of micromirrors and each of these micromirrors are controlled for modulating and projecting a display pixel. Depending on the resolution requirements of the displayed images, the number of required micromirrors ranges from 60,000 to several million for each SLM. Referring to FIG. 1A for a digital video system 1 includes a display screen 2 disclosed in a relevant U.S. Pat. No. 5,214,420. A light source 10 is used to generate light beams to project illumination for the display images on the display screen 2. The light 9 projected from the light source is further concentrated and directed toward lens 12 by way of mirror 11. Lenses 12, 13 and 14 form a beam columnator operative to columnate the light 9 into a column of light 8. A spatial light modulator 15 is controlled by a computer through data transmitted over data cable 18 to selectively redirect a portion of the light from path 7 toward lens 5 to display on screen 2. FIG. 1B shows a SLM 15 that has a surface 16 that includes an array of switchable reflective elements 17, 27, 37, and 47, each of these reflective elements is attached to a hinge 30. When the element 17 is in an ON position, a portion of the light from path 7 is reflected and redirected along path 6 to lens 5 where it is enlarged or spread along path 4 to impinge on the display screen 2 to form an illuminated pixel 3. When the element 17 is in an OFF position, the light is reflected away from the display screen 2 and, hence, pixel 3 is dark.
The on-and-off states of the micromirror control scheme as that implemented in the U.S. Pat. No. 5,214,420, and in most conventional display systems, impose a limitation on the quality of the display. Specifically, applying the conventional configuration of a control circuit limits the gray scale gradations produced in a conventional system (PWM between ON and OFF states) limited by the LSB (least significant bit, or the least pulse width). Due to the ON-OFF states implemented in the conventional systems, there is no way of providing a shorter pulse width than the duration represented by the LSB. The least intensity of light, which determines the gray scale, is the light reflected during the least pulse width. The limited levels of gray scale lead to a degradation of the display image.
Specifically, FIG. 1C exemplifies, as related disclosures, a circuit diagram for controlling a micromirror according to U.S. Pat. No. 5,285,407. The control circuit includes memory cell 32. Various transistors are referred to as “M*” where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5, and M7 are p-channel transistors; transistors, M6, M8, and M9 are n-channel transistors. The capacitances, C1 and C2, represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a based on a Static Random Access switch Memory (SRAM) design. All access transistors M9 on a Row line receive a DATA signal from a different Bit-line 31a. The particular memory cell 32 is accessed for writing a bit to the cell by turning on the appropriate row select transistor M9, using the ROW signal functioning as a Word-line. Latch 32a consists of two cross-coupled inverters, M5/M6 and M7/M8, which permit two stable states, that include a state 1 when Node A is high and Node B is low, and a state 2 when Node A is low and Node B is high.
FIG. 1A shows the operations of the switching between the dual states, as illustrated by the control circuit, to position the micromirrors in an ON or an OFF angular orientation. The brightness, i.e., the gray scales of a digitally controlled image system is determined by the length of time the micromirror stays in an ON position. The length of time a micromirror is in an ON position is controlled by a multiple bit word. As a simple illustration, FIG. 1D shows the “binary time intervals” when controlling micromirrors with a four-bit word. As shown in FIG. 1D, the time durations have relative values of 1, 2, 4, 8, which in turn define the relative brightness for each of the four bits where “1” is the least significant bit and “8” is the most significant bit. According to the control mechanism as shown, the minimum controllable differences between gray scales for showing different levels of brightness is a represented by the “least significant bit” that maintains the micromirror at an ON position.
For example, assuming n bits of gray scales, one time frame is divided into 2″−1 equal time periods. For a 16.7-millisecond frame period and n-bit intensity values, the time period is 16.7/(2″−1) milliseconds.
Having established these times for each pixel of each frame, pixel intensities are quantified such that black is a 0 time period, the intensity level represented by the LSB is 1 time period, and the maximum brightness is 2″−1 time periods. Each pixel's quantified intensity determines its ON-time during a time frame. Thus, during a time frame, each pixel with a quantified value of more than 0 is ON for the number of time periods that correspond to its intensity. The viewer's eye integrates the pixel brightness so that the image appears the same as if it were generated with analogous levels of light.
For controlling deflectable mirror devices, the PWM applies data to be formatted into “bit-planes”, with each bit-plane corresponding to a bit weight of the intensity of light. Thus, if the brightness of each pixel is represented by an n-bit value, each frame of data has n bit-planes. Then, each bit-plane has a 0 or 1 value for each display element. According to the PWM control scheme as described in the preceding paragraphs, each bit-plane is separately loaded and the display elements are controlled on the basis of bit-plane values corresponding to the value of each bit within one frame. Specifically, the bit-plane according to the LSB of each pixel is displayed for 1 time period.
In a mirror device configured to control the tilting of a mirror in the ON and OFF directions using address electrodes placed on either side of a cantilever (i.e., a hinge), an initiating voltage (that is, an initiating Coulomb force) for shifting the mirror from a stationary state to the ON or OFF state needs to be higher than the voltage required to shift the mirror between the ON and OFF state.
This is because elastic energy is not accumulated in the hinge in the horizontal stationary state of the mirror since the hinge is not deflected, whereas in the tilting state of the mirror, the hinge is deflected. Therefore, the elastic energy accumulated in the deflected hinge is released to contribute to driving of the mirror to shift from one tilted state to the other.
Therefore, an initiation voltage to be applied to the address electrode needs to be set high enough to generate the above described initiating Coulomb force.
However, if a larger number of pixels is packaged in a chip of a certain size to increase the definition of an image, the size of each pixel becomes proportionately smaller, and thus reducing the size of the transistor of a memory cell controlling the address electrode(s) and equipped within the aforementioned pixel, lowering the withstanding voltage and making it very difficult to secure a voltage to generate the necessary magnitude of the Coulomb force. Therefore a reduction in the initiating voltage is desirable.
Further, if the initiating voltage is high, there is a greater probability of the occurrence of stiction, a phenomenon in which the mirror becomes inoperable by being stuck to the address electrode, and there is also the technical problem of the mirror jumping greatly at the end of a shift, as a result of the speed of collision increasing when the mirror shifts to the address electrode on the ON or OFF side.
In the conventional techniques put forth by US Patent Application 20070007849, US Patent Application 20060066931, US Patent Application 20070258124, U.S. Pat. Nos. 5,903,383, 6,556,739, 6,571,029, Japanese Patent Application 2008015174, U.S. Pat. Nos. 6,778,304, and 5,096,279, only a voltage application pattern timing to an electrode(s) has been disclosed, not a specific configuration of connecting memory to the address electrode.
Specifically, in a countermeasure against the above described problems in which the electric potentials of the address electrode connected to memory are changed, the memory access speed needs to be increased, the difficulty of which increases with the number of pixels.
Further, the conventional techniques disclosed in the patents and patent applications listed above do not provide a single electrode with a countermeasure to stiction or to the above described jumping of the mirror, thus requiring separate electrodes for the above described countermeasures as well as requiring a reduced initiating voltage, all of which creates unnecessarily increases the complexity of the structure of a pixel.